Youcef  BOUCHEBABA
 


 
 
 
                                                     Chercheur à STMicroelectronics 
 
 

Domaines d'activité

Parallélisation  automatique, Transformation de programmes, MPSoC, Mapping, Systèmes embarqués, Optimisation des accès mémoire, Algorithmes Génétiques         
 

 

Publications


                                                                                               
Chapitre de livre

 

(1) Y. Bouchebaba, G. Nicolescu, and P. Paulin, MpAssign: A framework for solving the many-core platform mapping problem, à apparaître dans Springer.

 

(2) B. Girodias, Y. Bouchebaba, G. Nicolescu, E. M. Aboulhamid, B. Lavigueur and P. Paulin, Compiler Techniques for Application Level Memory Optimization for MPSoC ,  in Multi-Core Embedded Systems, CRC press, 2010.

 

(3) P. Paulin, M. Langevin, O. Benny, Y. Bouchebaba,  MPSoC platform mapping tools for data dominated applications»,  in Model-Based Design for Embedded Systems», CRC press, 2009.

(4)
T. Omnès, Y. Bouchebaba, C. Kulkarni and F. Coelho , Recent advances in low-power design and functional co-verification automation from the earliest system-level design stages, in Low-Power Electronics Design, C. Piguet editor, CRC Press, 2004.

 

 

 

                                                                                 Journaux avec comité de rédaction

 

(5) Bruno Girodias, Luiza Gheorghe, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin and Pierre Paulin, Combining Memory Optimization with Mapping of Multimedia Applications for Multi-Processors System-on-Chip.  A apparaître dans  le  journal  ACM Transactions on Embedded Computing Systems (TECS).

 

(6) Sébastien Le Beux, Guy Bois, Gabriela Nicolescu, Youcef Bouchebaba, Michel Langevin and Pierre G. Paulin, Combining mapping and partitioning exploration for NoC-based embedded systems. Journal of Systems Architecture - Embedded Systems Design 56(7): 223-232, 2010.

 

(7) B. Girodias, Y. Bouchebaba, G. Nicolescu, E. M. Aboulhamid, B. Lavigueur and P. Paulin,  Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications,  Journal of Signal Processing Systems 57(2): 263-283 (2009)

 

(8) Y. Bouchebaba, B. Girodias, G. Nicolescu, E.M. Aboulhamid, B. Lavigueur et P. Paulin, Memory space optimization using program transfomation, ACM Transaction on Design Automation of Electronic System (TODAES). vol. 12, no. 4, pp 579-603, 2007.

 

(9) Y. Bouchebaba, B. Girodias, F. Coelho, G. Nicolescu et E.M. Aboulhamid,  Buffer and register allocation for memory space optimization, Journal of VLSI Signal Processing System . vol. 49, no. 1, pp 579-603, 2007

 

(10) Y. Bouchebaba et F. Coelho, Pavage pour une séquence de nids de boucles, Technique et Science Informatiques, RSTI série TSI. vol. 21, no. 5, pp 579-603, 2002. Numéro spécial .Parallélisme et systèmes distribués.

 

 

                                                                                       Journaux en révision

 

(11) Y. Bouchebaba, G. Nicolescu, and P. Paulin, MpAssign: A framework for solving the many-core platform mapping problem, Sélectionné parmi les meilleurs articles de la conférence RSP 2010  pour une édition spéciale dans  le  journal Software : Practice and Experience.

 

 

 

                                                                                                    Conférences

 

(12) Bruno Girodias, Luiza Gheorghe, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin and Pierre Paulin, Combining Memory Optimization with Mapping of Multimedia Applications for Multi-Processors System-on-Chip, 21st IEEE International Symposium on Rapid System Prototyping, 2010.

 

(13) Y. Bouchebaba, P.  Paulin,    Ozcan, A.E.,  B. Lavigueur,  M.  Langevin, O. Benny, G.   Nicolescu;   MpAssign: A framework for solving the many-core platform mapping problem, , 21st IEEE International Symposium on Rapid System Prototyping, 2010.


(14) Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Youcef Bouchebaba,  Michel Langevin, Pierre Paulin, Optimizing Configuration and Application Mapping for MPSoC Architectures.   2009 NASA/ESA Conference on Adaptive Hardware and Systems confernece, 2009.

 

(15) Y. Bouchebaba, B. Lavigueur, B. Girodias, G. Nicolescu et P. Paulin,  MPSoC Memory optimization for digital camera applications, 10th IEEE Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007), pages 424 - 427, 2007

 

(16) Y. Bouchebaba, E. Bensoudane, B. Lavigueur, G. Nicolescu et P. Paulin, Two level tiling for MPSoC architecture, Proceedings of the IEEE 18th International Conference on Application-specific Systems, Architectures and Processors (ASAP'07), pages 283 - 290, 2007

 

(17) M. Brière, B. Girodias, Y. Bouchebaba, G. Nicolescu, F. Mieyeville, F. Gaffiot et I. O'Connor,  System level assessment of an optical NoC in an MPSoC platform, Design, Automation, and Test in Europe, Proceedings of the ACM conference on Design, automation and test in Europe, pages 1084 - 1089, 2007

 

(18) M. Brière, B. Girodias, Y. Bouchebaba, G. Nicolescu, F. Mieyeville, F. Gaffiot et I. O'Connor,  Architectural Exploration of Optical and Electrical Interconnects in MPSoC, the 5th international IEEEMWSCAS/ NEWCAS Conference, August 5-8, 2007, Montreal, Canada, pp. 1469-1472


(19) Y. Bouchebaba, G. Nicolescu, E.M. Aboulhamid et F. Coelho,  Buffer and register allocation for memory space optimization, Proceedings of the IEEE 17th International Conference on Applicationspecific Systems, Architectures and Processors (ASAP'06), pages 283 - 290, 2006

 

(20) Y. Bouchebaba, V. Gagne, G. Nicolescu et E.M. Aboulhamid,  SoC memory optimization using loop transformations, The 4th International IEEE-NEWCAS Conference, pages 189-192


(21) B. Girodias, Y. Bouchebaba, G. Nicolescu, E. M. Aboulhamid, P. Paulin et B. Lavigueur,  Application-Level Memory Optimization for MPSoC, Proceedings of the Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06), Pages : 169 - 178, 2006

 

(22) Y. Bouchebaba,  Fusion with buffer allocation for direct acyclic graphs of nested loops, 11th International Workshop on Compilers for Parallel Computers, CPC 2004.

 

(23) Y. Bouchebaba and F. Coelho,  Tiling and memory reuse for sequences of nested loops, Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference , Paderborn, Germany, August 27-30, 2002, Proceedings. Lecture Notes in Computer Science 2400 Springer 2002.

 

(24) Y. Bouchebaba and F. Coelho,  Buffered tiling for sequences of loop nests, International Workshop on Compilers and Operating Systems for Low Power, Barcelone, Espagne, Septembre 2001.

 

(25) Y. Li et Y. Bouchebaba,  A new genetic algorithm for the optimal communication spanning tree problem, Artificial Evolution, 4th European Conference, AE'99, Dunkerque, France, November 3-5, 1999,

 

(26) Y. Li et Y. Bouchebaba,  A new genetic algorithm for the optimal communication spanning tree problem, Algotel'2000 : Deuxième Rencontres Francophones sur les Aspects Algorithmiques des Télé-communications , La Rochelle , France, Mai 2000.

 

(27) Y. Bouchebaba et F. Coelho , Tiling pour une séquence de nids de boucles, RenPar' 13 : Treizième Rencontres Francophones du Parallélisme, Paris, France, Avril 2001.

 

(28) Y. Bouchebaba,  Réutilisation de la mémoire pour le pavage, RenPar' 14 : Quatorzième Rencontres Francophones du Parallélisme, Hammamet , Tunisie, Avril 2002.

 

                                 

                                                                                           

                                                                                        Workshops nationaux

 

(29) Y. Bouchebaba, V. Gagne, G. Nicolescu et E.M. Aboulhamid,  Memory Optimization by Using Loop Transformations : Fusion, Tiling and Buffer Allocations, The CMC Microsystems 2005 Annual Symposium.

 

(30) M. Brière, B. Girodias, Y. Bouchebaba, I.O. Connor, F. Mieyeville et L. Gheorghe,  Optical Network on Chip Evaluation in a System-Level MPSoC Platform, The CMC Microsystems 2005 Annual Symposium

 

(31) Y. Bouchebaba, Application d'un tiling d'E/S sur le produit de deux matrices,Workshop Compilation et Parallélisation Automatique , Strasbourg, France, 1999.

 

                                                                      

                                                                           Rapports de recherche 

 

(32) Youcef BOUCHEBABA. Un nouvel algorithme  génétique pour  le problème de l'arbre couvrant de communication  de coût minimum. Stage de DEA,  LARIA -AMIENS, 1999.

 

(33) Youcef BOUCHEBABA.  Elimination des gardes dans les transformées unimodulaires de boucles  mal imbriquées. Rapport  de Recherche, CRI -2000,  A-312.

 

 

Prix de recherche

Prix de recherche d’excellence du CRSNG (Conseil de recherches en sciences naturelles et en génie du Canada)

 

Charges collectives  

 

 

Relecteur pour le journal Microelectronics et les conférences : Newcas,  Date,  RSP…

 

Co- encadrement d’étudiants en PhD et en Maîtrise avec la professeur Gabriela Nicolescu

 

Responsable du projet de recherche sur les accès mémoire entre STMicroelectronics et L'Ecole Polytechnique de Montréal